AMD has introduced its sixth-generation EPYC Venice server processors, a data-centre lineup built on the new Zen 6 architecture that the company says doubles integer performance compared with the previous generation.
With demand for AI computing continuing to grow, AMD is building on its momentum with the next evolution of its server architecture. Unveiled at the AMD In Depth 2026 event in Las Vegas, the EPYC 9006 series scales up to 256 cores and 512 threads per socket using the density-optimized Zen 6c design, while a high-frequency variant offers up to 96 cores with clock speeds reaching 5.3 GHz. Compared with the fifth-generation “Turin” processors, AMD claims twice the integer throughput, 2.4 times the floating-point performance and 2.7 times the memory bandwidth.

Much of that performance gain comes from architectural improvements. According to AMD, the Zen 6c core delivers approximately 27% more instructions per clock across AI and server workloads, thanks to larger caches, wider execution resources and deeper scheduling queues. The compute dies are manufactured using TSMC‘s 2-nanometre process, with each 32-core complex featuring 128 MB of shared L3 cache. A Venice-X variant equipped with 3D V-Cache increases the total L3 cache to 1,152 MB per socket.
Beyond the raw processing power, AMD has also made significant improvements to memory and connectivity. The platform supports 16 channels of DDR5-8000 memory, including MRDIMMs, delivering up to 1.6 TB/s of memory bandwidth and a maximum capacity of 8 TB per socket. Support for PCIe Gen 6 and CXL 3.1 rounds out the platform, which AMD says has been developed alongside partners including Dell, HPE, Lenovo, Supermicro and Cisco.
AMD also introduced Verano, a single-socket variant featuring 24 channels of low-power LPDDR5X memory and field-replaceable memory modules, designed for deployments where power efficiency and density are priorities.

The company has also added new power-management features that allow a single processor to serve multiple performance tiers. Security improvements include support for post-quantum cryptography and expanded confidential-computing capabilities, ranging from SEV to SEV-TIO.
On the software side, AMD highlighted MEXT, an AI-driven technology that uses flash storage as an extension of system memory. According to the company, this approach can reduce DRAM requirements by 20% to 75% while maintaining up to 99% of the performance of an all-DRAM configuration.
Since launching EPYC in 2017, AMD has continued its push for a larger share of the server market. The company claims that, on average, one business from the Forbes Global 2000 switches to its processors every week. It remains to be seen how much of an impact the new Venice chips will have on the industry, but on paper, the performance figures are certainly impressive. The real test will come as businesses begin deploying the processors over the coming months and years, revealing whether AMD’s latest architecture can deliver on its promises.




